This chapter describes the steps involved in performing an A/D conversion on a selected input channel using direct programming (without the driver software).
All A/D conversions are stored in an on-board FIFO (first in first out memory). The FIFO can hold up to 1024 samples. Each time an A/D conversion is finished, the data is stored in the FIFO, and the FIFO counter increments by 1. Each time you read A/D data, you are actually reading it out of the FIFO, and the FIFO counter decrements by 1. When the FIFO is empty the data read from it is undefined; you may continue to read the last sample, or you may read all 1s.
You can read each A/D sample as soon as it is ready, or you can wait until you take a collection of samples (up to 1024 maximum) and then read them all out at once.
To be sure that you are getting only current A/D data, be sure to reset the FIFO each time before you start any A/D operation. This will prevent errors caused by leaving data in from a previous operation. To reset the FIFO, write a 1 to bit 2 of register Base+7. This bit is not a real register bit but triggers a command in the board’s controller chip. Therefore, you do not need to write a 1 followed by a 0. However, writing to the FIFORST bit affects the values of other bits in this register as well:
outp(Base+7, 0x02); // resets the FIFO and clears SCANEN and FIFOEN
outp(Base+7, 0x0A); // resets the FIFO and SCANEN but leaves FIFOEN set
Note that this register also contains a FIFO enable bit, FIFOEN. This bit only has meaning during A/D interrupt operations. The FIFO is always enabled and is always in use during A/D conversions.
Perform an A/D conversion according to the following steps. Each step is discussed in detail, below.
If you are going to sample the same channel multiple times or sample multiple consecutive channels with the same input range, you only need to perform steps 1-3 once, and then you can repeat steps 4-6 or 4-7 as many times as desired.
Diamond Systems also provides sample register level code, downloadable at:
http://diamondsystems.com/files/binaries/SourceCodeExamples.zip
Poseidon contains a channel counter circuit that controls which channel will be sampled on each A/D conversion command. The circuit uses two channel numbers called the low channel and high channel. These are stored in registers at Base+2 and Base+3. The circuit starts at the low channel and automatically increments after each A/D conversion until the high channel is reached. When an A/D conversion is performed on the high channel, the circuit resets to the low channel and starts over again. This behavior enables you simplify your software by setting the channel range just once.
To read continuously from a single channel, write the same channel number to both the low channel and high channel registers.
To read from a series of consecutively numbered channels, write the starting channel to Base+2 and the ending channel to Base+3.
To read from a group of non-consecutive channels, you must treat each as a single channel, as described above.
Select the code corresponding to the desired input range and write it to the analog I/O control register at Base+11. You only need to write to this register if you want to select a different input range from the one used for the previous conversion. If all channels will be using the same input range, you can configure this register just once at the beginning of your procedure.
You can read the current value of this register by reading from Base+11.
After changing either the input channel or the input range, you must allow the circuit to settle on the new value before performing an A/D conversion. The settling time is long compared to software execution times, so a timer is provided on board to indicate when it is safe to proceed with A/D sampling. The WAIT bit at Base+11 indicates when the circuit is settling and when it is safe to sample the input. When WAIT is 1, the board is settling. When WAIT is 0, the board is ready for an A/D conversion.
To generate an A/D conversion, simply write to Base+0 to start the conversion. Any value may be written to the register.
The A/D converter takes about four microseconds to complete a conversion. If you try to read the A/D converter data immediately after starting a conversion, you will get invalid data. Therefore, the A/D converter provides a status signal to indicate whether it is busy or idle. This signal can be read back as the STS bit in the status register at Base+8. When the A/D converter is busy (performing an A/D conversion) this bit is 1. When the A/D converter is idle (conversion is done and data is available) this bit is 0.
Once the conversion is complete, you can read the data back from the A/D converter. The data is 16 bits wide and is read back in two 8-bit bytes at Base+0 and Base+1. The low byte must be read first.
Note: Reading data from an empty FIFO returns unpredictable results.
The following pseudo-code illustrates how to read and construct the 16-bit A/D value with 8-bit accesses:
LSB = inp(base);
MSB = inp(base+1);
Data = MSB * 256 + LSB; // combine the 2 bytes into a 16-bit value
Alternatively, the value can be read as one 16-bit value, which is preferred since this method increases overall system bandwidth while reading data from the FIFO. For example,
Data = inpw(base); // Where the MSB and LSB are read in one access
The final data ranges from 0 to 65535 (0 to 256 - 1) as an unsigned integer. This value must be interpreted as a signed integer ranging from -32768 to +32767.
As noted above, all A/D conversions are stored in an on-board FIFO, which can hold up to 1024 samples in enhanced mode or 512 samples in normal mode. Whenever you read A/D data you are actually reading it out of the FIFO. Therefore, you can read each A/D sample as soon as it is ready, or you can wait until you take a collection of samples (up to 1024 maximum) and then read them all out in sequence.
Once you have the A/D value, you need to convert it to a meaningful value. The A/D conversion formulas describe how to convert the A/D data back to the original input voltage. You may also convert the result into engineering units. The two conversions can be done sequentially, or the formulas can be combined into a single formula.