Digital I/O Operation

Poseidon contains two sets of digital I/O lines.

Main Digital I/O Internal 82C55 Circuit

The 82C55-type digital I/O circuit is accessed through page 1 at addresses Base+12 through Base+15. For example, address 0 on the chip is equivalent to address 12 in the register map. Before performing any access to the digital I/O circuit, you must set the current page to page 1 using the miscellaneous control register at Base+8, to ensure that the proper page is enabled.

Note: that writing page bits to the miscellaneous control register will not cause a board reset or interrupt reset operation as long as the two reset bits are left at 0. Also, writing a 1 to either reset bit in this register will not change the contents of the page bits.

The current page may be determined by reading the page bits at Base+7.

This digital I/O circuit functions like an 82C55 in Mode 0, direct I/O, or Mode 1, latched I/O. In Mode 1, latch and acknowledge signals are provided. Each port, A, B and C, can be programmed for input or output. Port C can also be split into two halves, with each half programmed for a different direction.

All 24 lines have 10KΩ resistors connected to them that can be configured for either pull-up or pull-down operation. In addition, all lines are buffered by 74FCT245 line drivers between the controller chip and the I/O header. These line drivers change direction automatically in response to the control word written.

On power up, all ports are set to input mode and can be used as inputs immediately. Before using any port as an output, the port direction register must be programmed appropriately.

The following table provides a list of common configuration register values for programming port direction.

Mode 0 Digital I/O

This is the simpler of the two I/O modes and works well for most uses. In mode 0, the handshaking signals Latch and Acknowledge are not used. When reading any port in input mode, the data at the I/O pins at the time of the read command is returned.

Mode 1 Digital I/O With Handshaking

In Mode 1, a Latch input and an Acknowledge output signal are provided for handshaking operation. This allows the external circuit to tell the board when new input data is ready or when it has accepted the current output data, and it allows the board to tell the external circuit when it has read the current input data and when new output data is ready. Only Port A may be operated in Mode 1.

In all cases, the starting/resting conditions are Latch input = low, and Acknowledge output = low.

Note: Mode 1 is not currently supported by Diamond Systems Universal Driver software.

Auxiliary Digital I/O

CN12 contains three digital outputs and four digital inputs that can be used either for general purpose digital I/O, or for A/D and counter/timer functions. The operation of these bits is controlled with various bits in two control registers.

Outputs

DOUT2/CTROUT2, CN12 pin 28

The function of this pin is determined by OUT2EN, Base+10 bit 5.

DOUT1/SHOUT CN12, pin 30

This pin is always the value written to DOUT1 at Base+1, bit 1.

DOUT0/CTROUT0 CN12, pin 27

The function of this pin is determined by OUT0EN, Base+10, bit 4.

Inputs

DIN3/EXTCLK CN12, pin 31.

This signal may always be read at Base+4, bit 3. It may function as an external clock to control A/D conversion timing when CLKEN = 1 and CLKSEL = 0, in Base+9.

DIN2/EXTGATE CN12, pin 32.

This signal may always be read at Base+4, bit 2. It may function as an external gate to enable and disable A/D conversions when GT12EN = 1, in Base+10, bit 0.

DIN1/GATE0 CN12, pin 26.

This signal may always be read at Base+4, bit 1. It may function as an external gate for Counter 0 when GT0EN = 1 in Base+10, bit 2. When used as a gate, it is active high, which means that Counter 0 counts as long as it is high and does not count when it is low.

This signal may always be read at Base+,4 bit 0. It may function as an external clock for counter 0 when SRC0 = 0 in Base+10, bit 1. When used as a clock for Counter 0, the rising edge is active.